Use of Abstraction for Generating Timing Models for Hierarchical Design Closure

Abstract

Today's designs need hierarchical timing analysis because of the physical limitations of hardware and software, as well as the complexity and scale of these systems. One crucial technique that enables the lightweight representation of design blocks for timing closure is timing model generation. In this work, we examine these models from the standpoint of accuracy and make predictions about future directions that might enhance them for hierarchical timing closure.